US 2022/0285377 A1 · SEMICONDUCTOR DEVICE

Abstract

Embodiments provide a semiconductor device capable of being highly integrated. A semiconductor device includes a semiconductor substrate, a first insulating layer formed toward an inside of a semiconductor substrate from a main surface of the semiconductor substrate, and a transistor formed on the first insulating layer. the transistor has a first semiconductor layer formed on the first insulating layer to be insulated from the semiconductor substrate, a second insulating layer provided on a second region among of a first region, the second region, and a third region sequentially arranged in a first direction along the main surface of the first semiconductor layer, and a first conductive layer provided on the second insulating layer. a first contact is connected to the first region of the first semiconductor layer, a second contact is connected to the third region of the first semiconductor layer, and a third contact is connected to the first conductive layer.

Claims19

Dependent claims

A semiconductor device comprising:

a semiconductor substrate having a main surface;
a first insulating layer extending in a direction perpendicular to the main surface of the semiconductor substrate;
and
a transistor formed on the first insulating layer, having:
(i) a first semiconductor layer formed on the first insulating layer and including a first region, a second region, and a third region sequentially arranged in a first direction along the main surface of the semiconductor substrate, (ii) a second insulating layer disposed on the second region, and (iii) a first conductive layer disposed on the second insulating layer,
wherein
a first contact is connected to the first region,
a second contact is connected to the third region, and
a third contact is connected to the first conductive layer.

6 more elements

A semiconductor device comprising:

a semiconductor substrate having a main surface;
a first insulating layer disposed in a groove extending in a direction perpendicular to the main surface of the semiconductor substrate;
and
a plurality of transistor pairs that are formed on the first insulating layer, arranged in a first direction along the main surface of the semiconductor substrate, and arranged in a second direction intersecting the first direction, wherein
each of the plurality of transistor pairs has (i) a first semiconductor layer formed on the first insulating layer and including a first region, a second region, a third region, a fourth region, and a fifth region sequentially arranged in the first direction, (ii) second insulating layers respectively disposed on the second region and the fourth region of the first semiconductor layer, and (iii) first conductive layers respectively disposed on the second insulating layers,
a first contact is connected to the first region,
a second contact is connected to the third region,
a third contact is connected to the first conductive layer on the second region,
a fifth contact is connected to the fifth region of the first semiconductor layer,
a sixth contact is connected to the first conductive layer on the fourth region, and
portions corresponding to the first region to the third region are configured to provide a first transistor, and portions corresponding to the third region to the fifth region are configured to provide a second transistor.

8 more elements

Dependencies are inferred from the claim text.

Semiconductor device

Life of this patent

Semiconductor device

Life of this patent

Abstract

Claims19