US 2022/0285353 A1 · SEMICONDUCTOR MEMORY DEVICE

Abstract

A semiconductor memory device includes: an active layer spaced apart from a substrate wherein the active layer extends in a direction parallel to the substrate, and includes a channel; a bit line extending in a direction perpendicular to the substrate and coupled to a first end of the active layer; a capacitor coupled to a second end of the active layer; and a double word line including a pair of dual work function electrodes that extend in a direction crossing the active layer with the active layer interposed therebetween, wherein each of the dual work function electrodes includes: a high work function electrode which is adjacent to the bit line; and a low work function electrode which is adjacent to the capacitor and having a lower work function than the high work function electrode.

Claims27

Dependent claims

A semiconductor memory device comprising:

an active layer spaced apart from a substrate wherein the active layer extends in a direction parallel to the substrate and includes a channel;
a bit line extending in a direction perpendicular to the substrate and coupled to a first end of the active layer;
a capacitor coupled to an end of a second end of the active layer;
and
a double word line including a pair of dual work function electrodes extending in a direction crossing the active layer with the active layer interposed therebetween,
wherein each of the dual work function electrodes includes:
a high work function electrode which is adjacent to the bit line;
and
a low work function electrode which is adjacent to the capacitor and having a lower work function than the high work function electrode.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device

Life of this patent

Semiconductor memory device

Life of this patent

Abstract

Claims27