Semiconductor packages and methods for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShin-Yi YANG, Ming-Han LEE, Shau-Lin SHUE
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShin-Yi YANG, Ming-Han LEE, Shau-Lin SHUE
Estimating the term…
Embodiments of the present disclosure provide an integrated circuit die having edge interconnect features. The edge interconnect features may be conductive lines extending through sealing rings and exposed on edge surfaces of the integrated circuit die. The edge interconnect features are configured to connect with other integrated circuit dies without going through an interposer. The semiconductor device may include two or more integrated circuit dies with edge interconnect features and connected through one or more inter-chip connectors formed between the two or more integrated circuit dies. In some embodiments, the inter-chip connectors may be formed by a selective bumping process during packaging.
A semiconductor package, comprising:
A semiconductor package, comprising:
A method for forming a semiconductor device, comprising:
Dependencies are inferred from the claim text.