Package comprising metal layer configured for electromagnetic interference shield and heat dissipation

An apparatus comprising:

• a substrate comprising:
• at least one dielectric layer;
• and
• a plurality of interconnects;
• an integrated device coupled to the substrate;
• means for encapsulation located over the substrate;
• means for encapsulation layer interconnection located in the means for encapsulation, wherein the means for encapsulation layer interconnection is coupled to the substrate;
• and
• means for electromagnetic interference (EMI) shield located over the means for encapsulation, wherein the means for EMI shield is located over a backside of the integrated device.

A package comprising:

• a substrate comprising:
• at least one dielectric layer;
• and
• a plurality of interconnects;
• an integrated device coupled to the substrate;
• an encapsulation layer located over the substrate;
• at least one encapsulation layer interconnect located in the encapsulation layer, wherein the at least one encapsulation layer interconnect is coupled to the substrate;
• and
• at least one thermal dielectric layer located over the encapsulation layer, wherein the at least one thermal dielectric layer is located over a backside of the integrated device.

A method for fabricating a package, comprising:

• providing a substrate comprising:
• at least one dielectric layer;
• and
• a plurality of interconnects;
• coupling an integrated device to the substrate;
• forming an encapsulation layer located over the substrate;
• forming at least one encapsulation layer interconnect located in the encapsulation layer, wherein the encapsulation layer interconnect is coupled to the substrate;
• and
• forming at least one metal layer over the encapsulation layer,
• wherein the at least one metal layer is configured as an electromagnetic interference (EMI) shield for the package, and
• wherein the at least one metal layer is located over a backside of the integrated device.

A package comprising:

• a substrate comprising:
• at least one dielectric layer;
• and
• a plurality of interconnects;
• an integrated device coupled to the substrate;
• an encapsulation layer located over the substrate;
• at least one encapsulation layer interconnect located in the encapsulation layer, wherein the at least one encapsulation layer interconnect is coupled to the substrate;
• and
• at least one dielectricum layer located over the encapsulation layer, wherein the at least one dielectricum layer is located over a backside of the integrated device.