Semiconductor memory device and method of manufacturing the same

A semiconductor memory device comprising:

• a staircase portion provided in a first region of a stacked body and provided with staircases, the stacked body having a plurality of conductive layers and a plurality of insulating layers stacked alternately one by one, the staircase portion having the conductive layers as terrace surfaces, and the staircases being arranged in n rows (where n is an integer of three or more) in a first direction intersecting a stacking direction of the stacked body;
• a columnar body provided in a second region of the stacked body, penetrating the stacked body in the stacking direction, and having a plurality of memory cells at each positions facing the plurality of conductive layers;
• and
• a contact connected to the terrace surface,
• wherein the staircases included in the staircase portion are each formed to ascend for each first step having p (n=p) conductive layers of the plurality of conductive layers in a second direction intersecting the stacking direction and the first direction, and
• the terrace surfaces arranged in the first direction of the terrace surfaces of the staircases are different in height from each other and are formed to ascend for each second step having one conductive layer of the plurality of conductive layers in the first direction.