Fan-out wafer level packaging of semiconductor devices

A semiconductor device assembly, comprising:

• a semiconductor die having a back side, a front side and a plurality of edge surfaces extending between the back side and the front side, the back side being coupled with a base including silicon, the front side including active circuitry;
• a first resin encapsulation layer disposed on the base, the plurality of edge surfaces, and the front side of the front side of the semiconductor die, the first resin encapsulation layer being patterned to define a first opening that exposes a portion of the front side of the semiconductor die through the first resin encapsulation layer;
• a signal distribution structure:
• disposed on the first resin encapsulation layer;
• and
• disposed in the first opening, such that the signal distribution structure is electrically coupled with the front side of the semiconductor die through the first opening;
• a second resin encapsulation layer disposed on the signal distribution structure, the second resin encapsulation layer being patterned to define a second opening that exposes a portion of the signal distribution structure;
• and
• a solder ball disposed in the second opening, the solder ball being electrically coupled with the signal distribution structure.

A method of producing a semiconductor device assembly, the method comprising:

• coupling a semiconductor die with a base, the semiconductor die having a back side and a front side, the back side being coupled with the base, the front side including active circuitry;
• forming a first resin encapsulation layer on, at least, a first portion of the front side of the semiconductor die, the first resin encapsulation layer being patterned to define a first opening that exposes a second portion of the front side of the semiconductor die through the first resin encapsulation layer;
• forming a signal distribution structure on the first resin encapsulation layer, and in the first opening, such that the signal distribution structure is electrically coupled with the front side of the semiconductor die;
• and
• forming a second resin encapsulation layer on, at least, a first portion of the signal distribution structure, the second resin encapsulation layer being patterned to define a second opening that exposes a second portion of the signal distribution structure.