Mitigating surface damage of probe pads in preparation for direct bonding of a substrate

A bonded structure, including a buried probe pad on a first substrate for microelectronics, the structure comprising:

• a first substrate including the probe pad at least partially embedded in a layer of a dielectric material, the probe pad having an upper surface configured for test contact;
• and
• a first insulating layer formed over the upper surface of the probe pad;
• a second substrate including a second insulating layer, wherein the second insulating layer is directly bonded to the first insulating layer of the first substrate.

A semiconductor device for a hybrid direct bonding process, comprising:

• a probe pad in a metallization layer of a semiconductor substrate, a contact surface of the probe pad comprising a mark characteristic of contact with a test probe;
• an insulating layer over the contact surface of the probe pad, the insulating layer including openings over electrical contacts in the substrate;
• and
• a metal in the openings;
• wherein top surfaces of the metal and the insulating layer provide a hybrid direct bonding surface with metal and nonmetal regions for the hybrid direct bonding process.

A method of preparing a semiconductor substrate for direct bonding, comprising:

• providing the semiconductor substrate, including a plurality of conductive pads;
• testing circuitry of the semiconductor substrate including contacting at least one of the conductive pads;
• after testing, depositing an insulating layer above the conductive pads;
• planarizing the insulating layer;
• patterning the insulating layer to form openings;
• providing metal in the openings;
• planarizing the metal and the insulating layer to provide a surface having metal and nonmetal regions for direct bonding.