Memory device and operation method thereof
AssigneeMacronix International Co., Ltd.
InventorsYun-Yuan WANG, Dai-Ying LEE
Life of this patent
Estimating the term…
Abstract
A memory device and an operation method thereof are provided. The memory device comprises: a memory array including a plurality of memory cells; a plurality of bit lines coupled to the memory array; a plurality of word lines coupled to the memory array; and a plurality of conductance controllable units coupled to the memory array; wherein a memory cell group and at least one conductance controllable unit among the conductance controllable units form a logic operation unit, and a logic operation function of the logic operation unit is determined by an equivalent conductance of the at least one conductance controllable unit.
Claims19
A memory device comprising:
- a memory array including a plurality of memory cells;
- a plurality of bit lines coupled to the memory array;
- a plurality of word lines coupled to the memory array;
- and
- a plurality of conductance controllable units coupled to the memory array;
- wherein a memory cell group and at least one conductance controllable unit among the conductance controllable units form a logic operation unit, and a logic operation function of the logic operation unit is determined by an equivalent conductance of the at least one conductance controllable unit;
- and
- a plurality of input cells of the memory cell group of the logic operation unit store input data of the logic operation function and an output cell of the memory cell group of the logic operation unit store output data of the logic operation function.
An operation method for a memory device, the operation method comprising:
- selecting a memory cell group of a plurality of memory cells of the memory device and at least one conductance controllable unit to form a logic operation unit;
- and
- controlling an equivalent conductance of the at least one conductance controllable unit to determine a logic operation function of the logic operation unit;
- wherein
- a plurality of input cells of the memory cell group of the logic operation unit store input data of the logic operation function and an output cell of the memory cell group of the logic operation unit store output data of the logic operation function.
Dependencies are inferred from the claim text.