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US 2022/0284944 A1Published application
System and method for detecting memory cell disturbance by monitoring canary cells
AssigneeHewlett Packard Enterprise Development LP
InventorsMelvin K. Benedict, Eric L. Pope
Life of this patent
Estimating the term…
Abstract
One embodiment provides a memory module. The memory module includes a plurality of rows of memory cells, with a respective row comprising one or more canary memory cells that are more susceptible to disturbance than non-canary memory cells, and a disturbance-detection circuit coupled to at least one canary memory cell of a corresponding row and configured to output a control signal in response to the disturbance to the canary memory cell exceeding a predetermined threshold.
Claims20
A memory module, comprising:
- a plurality of rows of memory cells, wherein a respective row comprises one or more canary memory cells that are more susceptible to disturbance than non-canary memory cells;
- and
- a disturbance-detection circuit coupled to at least one canary memory cell of a corresponding row and configured to output a control signal in response to detecting disturbance to the canary memory cell exceeding a predetermined threshold;
- wherein the disturbance-detection circuit comprises at least a first transistor coupled to a capacitor within the canary memory cell, wherein the first transistor is configured to be turned on when the disturbance to the canary memory cell exceeds the predetermined threshold.
1 more element
(canceled)
A method for detecting disturbance to a memory module, comprising:
- including one or more canary memory cells in each row of the memory module, wherein the canary memory cells are more susceptible to the disturbance than non-canary memory cells;
- and
- outputting, by a disturbance-detection circuit coupled to at least one canary memory cell of a corresponding row, a control signal, in response to detecting the disturbance to the canary memory cell exceeding a predetermined threshold;
- wherein the disturbance-detection circuit comprises at least a first transistor coupled to a capacitor within the canary memory cell, wherein the first transistor is configured to be turned on when the disturbance to the canary memory cell exceeds the predetermined threshold.
1 more element
(canceled)
Dependencies are inferred from the claim text.