Method and signal processing circuit for determining a signal histogram

A signal processing circuit for determining a signal histogram having a predetermined number of bins, wherein the signal processing circuit comprises:

• an input for receiving an input signal;
• a decimator circuit that decimates the input signal, thereby generating a decimated signal that comprises a maximum signal value and a minimum signal value associated with the maximum signal value;
• and
• a calculation circuit that assigns the maximum signal value to a first bin of a signal histogram, wherein the calculation circuit also assigns the minimum signal value to a second bin of the signal histogram, and wherein the calculation circuit fills at least one intermediate bin of the signal histogram with an intermediate value, wherein the intermediate bin is located between the first bin and the second bin in the signal histogram.