Semiconductor device structure and methods of forming the same

An interconnection structure, comprising:

• a first conductive feature;
• a first dielectric material disposed adjacent the first conductive feature;
• a second conductive feature disposed adjacent the first dielectric material;
• a first etch stop layer disposed on the first conductive feature;
• a second etch stop layer disposed on the first dielectric material, wherein the second etch stop layer is at a different level as the first etch stop layer;
• a first liner disposed between the first conductive feature and the first dielectric material, wherein the first liner is in contact with the first and second etch stop layers;
• and
• a second dielectric material disposed on the first etch stop layer and the second etch stop layer, wherein the second dielectric material is in contact with the first liner.

A method, comprising:

• forming a first etch stop layer on a conductive layer;
• forming a mask layer on the first etch stop layer, wherein the mask layer comprises a metal;
• forming one or more openings in the mask layer, the first etch stop layer, and the conductive layer;
• forming a first dielectric material in the one or more openings, wherein top surfaces of the first dielectric material and the mask layer are substantially co-planar;
• selectively forming a second etch stop layer on the first dielectric material;
• removing the mask layer;
• and
• forming a second dielectric material on the first and second etch stop layers.