US 2022/0276554 A1 · Enforcing mask synthesis consistency across random areas of integrated circuit chips

Abstract

A system generates a mask for a circuit design while enforcing symmetry and consistency across random areas of the mask. The system builds a mask solutions database mapping circuit patterns to mask patterns. The system uses the mask solutions database to replace circuit patterns of the circuit design with mask patterns. The system identifies properties in circuit patterns of the circuit design and enforces the same property in the corresponding mask patterns. Examples of properties enforced include symmetry within circuit patterns and similarity across circuit patterns. The system combines mask patterns in different regions of the circuit and resolves conflicts that occur when there are multiple masks within a region.

Claims20

Dependent claims

A method to perform mask synthesis for a circuit design, the method comprising:

receiving the circuit design representing a physical layout of a circuit, the circuit design comprising geometric shapes;
receiving a mask design for the circuit design;
identifying one or more circuit patterns within the circuit design;
identifying one or more mask patterns, each mask pattern corresponding to a circuit pattern from the one or more circuit patterns;
determining a property of the one or more circuit patterns, the property based on geometric shapes within the one or more circuit patterns;
determining, by a processing device, a mask pattern based on the one or more mask patterns such that the determined mask pattern has a corresponding property as the one or more circuit patterns;
and
replacing at least a portion of the mask design using the determined mask pattern.

5 more elements

A non-transitory computer readable storage medium storing instructions to perform mask synthesis for a circuit design, the instructions when executed by one or more computer processors cause the one or more computer processors to:

receive the circuit design representing a physical layout of a circuit, the circuit design comprising geometric shapes;
receive a mask design for the circuit design;
identify one or more circuit patterns within the circuit design;
identify one or more mask patterns, each mask pattern corresponding to a circuit pattern from the one or more circuit patterns;
determine a property of the one or more circuit patterns, the property based on geometric shapes within the one or more circuit patterns;
determine, by a processing device, a mask pattern based on the one or more mask patterns such that the determined mask pattern has a corresponding property as the one or more circuit patterns;
and
replace at least a portion of the mask design using the determined mask pattern.

5 more elements

A computer system comprising:

one or more computer processors;
and
a non-transitory computer readable storage medium storing instructions to perform mask synthesis for a circuit design, the instructions when executed by the one or more computer processors cause the one or more computer processors to:
receive the circuit design representing a physical layout of a circuit, the circuit design comprising geometric shapes;
receive a mask design for the circuit design;
identify one or more circuit patterns within the circuit design;
identify one or more mask patterns, each mask pattern corresponding to a circuit pattern from the one or more circuit patterns;
determine a property of the one or more circuit patterns, the property based on geometric shapes within the one or more circuit patterns;
determine, by a processing device, a mask pattern based on the one or more mask patterns such that the determined mask pattern has a corresponding property as the one or more circuit patterns;
and
replace at least a portion of the mask design using the determined mask pattern.

8 more elements

Dependencies are inferred from the claim text.

Enforcing mask synthesis consistency across random areas of integrated circuit chips

Life of this patent

Enforcing mask synthesis consistency across random areas of integrated circuit chips

Life of this patent

Abstract

Claims20