Digital pixel sensor and analog digital converter

A digital pixel sensor comprising:

• a pixel array including a first pixel configured to output a first pixel signal and a second pixel configured to output a second pixel signal different from the first pixel signal;
• and
• a bank disposed on the pixel array, the bank comprising:
• a first comparator configured to perform analog signal processing on the first pixel signal to output a first analog signal;
• a second comparator configured to perform digital signal processing on the first analog signal to output a first comparison result signal;
• a third comparator configured to perform the analog signal processing on the second pixel signal to output a second analog signal;
• a fourth comparator configured to perform the digital signal processing on the second analog signal to output a second comparison result signal;
• and
• a counter configured to latch count code based on the first comparison result signal and the second comparison result signal,
• wherein the first comparator to the fourth comparator are disposed in a first direction, and the counter is disposed adjacent to the first comparator to the fourth comparator in a second direction intersecting the first direction.

An analog digital converter comprising:

• a comparator configured to compare a reference signal with a pixel signal output from a pixel and output a comparison result signal;
• a count code generator configured to receive a code generation clock signal from a clock signal generator, and output first count code and second count code according to the code generation clock signal;
• a first memory configured to latch the first count code based on a reset component of the comparison result signal during a first time period;
• and
• a second memory configured to latch the second count code based on an image signal component of the comparison result signal during a second time period subsequent to the first time period,
• wherein during a third time period subsequent to the second time period, the first count code is read from the first memory, and
• during a fourth time period subsequent to the third time period, the second count code is read from the second memory.

A digital pixel sensor comprising:

• a pixel array including a plurality of pixels;
• and
• a bank disposed on the pixel array, the bank comprising:
• a plurality of comparators disposed on the plurality of pixels and configured to compare each of a plurality of pixel signals output from the plurality of pixels with a reference signal to output a plurality of comparison result signals;
• and
• a counter connected to the plurality of comparators, and configured to receive the plurality of comparison result signals and latch count code based on the plurality of comparison result signals.