Dynamic d flip-flop, data operation unit, chip, hash board and computing device

A dynamic D flip-flop, comprising:

• an input terminal, an output terminal and at least one clock signal terminal;
• a first latch unit for transmitting data of the input terminal and latching the data under control of a clock signal;
• a second latch unit for latching data of the output terminal and inversely transmitting the data latched by the first latch unit under control of a clock signal;
• and
• the first latch unit, the second latch unit being sequentially connected in series between the input terminal and the output terminal;
• wherein the second latch unit outputs in high level, low level and high impedance states by means of a single element under control of a clock signal;
• the data output by the output terminal is inverse to the data input from the input terminal.