Electrostatic protection element and semiconductor device

An electrostatic protection element, comprising:

• a semiconductor substrate of a first conductivity type;
• a high-density source region of a second conductivity type that is formed along a surface of the semiconductor substrate, and that is connected to either one of a power source line and ground line that are configured to transmit a power source voltage;
• a low-density source region of the second conductivity type that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density source region, and that has a lower impurity concentration than an impurity concentration of the high-density source region;
• a high-density drain region of the second conductivity type that is formed along the surface of the semiconductor substrate so as to be separated from the high-density source region and the low-density source region, and that is connected to another one of the power source line and the ground line;
• a low-density drain region of the second conductivity type that is formed so as to be separated from the high-density source region and the low-density source region, that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density drain region, and that has a lower impurity concentration than an impurity concentration of the high-density drain region;
• a gate insulating film that is formed over the exposed surfaces of the low-density source region and the low-density drain region, as well as a region of the surface of the semiconductor substrate between the exposed surfaces;
• a gate electrode that is formed on the gate insulating film, and that is connected to said either one of the power source line and the ground line;
• and
• a well region of the second conductivity type that is formed on a bottom surface of the low-density drain region, and that has a lower impurity concentration than the impurity concentration of the high-density drain region.

A semiconductor device, comprising:

• a power source line and a ground line that transmit a power source voltage;
• a semiconductor substrate of a first conductivity type;
• an internal circuit that is formed on the semiconductor substrate, and that operates using the power source voltage transmitted via the power source line and the ground line;
• and
• an electrostatic protection element formed on the semiconductor substrate,
• wherein the electrostatic protection element includes:
• a high-density source region of a second conductivity type that is formed along a surface of the semiconductor substrate, and that is connected to either one of a power source line and ground line that are configured to transmit a power source voltage;
• a low-density source region of the second conductivity type that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density source region, and that has a lower impurity concentration than an impurity concentration of the high-density source region;
• a high-density drain region of the second conductivity type that is formed along the surface of the semiconductor substrate so as to be separated from the high-density source region and the low-density source region, and that is connected to another one of the power source line and the ground line;
• a low-density drain region of the second conductivity type that is formed so as to be separated from the high-density source region and the low-density source region, that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density drain region, that has a lower impurity concentration than an impurity concentration of the high-density drain region, and that extends to a deeper region from the surface of the semiconductor substrate than does the low-density source region;
• a gate insulating film that is formed over the exposed surfaces of the low-density source region and the low-density drain region, as well as a region of the surface of the semiconductor substrate between the exposed surfaces;
• and
• a gate electrode that is formed on the gate insulating film, and that is connected to said either one of the power source line and the ground line.

A semiconductor device, comprising:

• a power source line and a ground line that transmit a power source voltage;
• a semiconductor substrate of a first conductivity type;
• an internal circuit that is formed on the semiconductor substrate, and that operates using the power source voltage transmitted via the power source line and the ground line;
• and
• an electrostatic protection element formed on the semiconductor substrate,
• wherein the electrostatic protection element includes:
• a high-density source region of a second conductivity type that is formed along a surface of the semiconductor substrate, and that is connected to either one of a power source line and ground line that are configured to transmit a power source voltage;
• a low-density source region of the second conductivity type that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density source region, and that has a lower impurity concentration than an impurity concentration of the high-density source region;
• a high-density drain region of the second conductivity type that is formed along the surface of the semiconductor substrate so as to be separated from the high-density source region and the low-density source region, and that is connected to another one of the power source line and the ground line;
• a low-density drain region of the second conductivity type that is formed so as to be separated from the high-density source region and the low-density source region, that has an exposed surface that is exposed at the surface of the semiconductor substrate, that is in contact with the high-density drain region, and that has a lower impurity concentration than an impurity concentration of the high-density drain region;
• a gate insulating film that is formed over the exposed surfaces of the low-density source region and the low-density drain region, as well as a region of the surface of the semiconductor substrate between the exposed surfaces;
• a gate electrode that is formed on the gate insulating film, and that is connected to said either one of the power source line and the ground line;
• and
• a well region of the second conductivity type that is formed on a bottom surface of the low-density drain region, and that has a lower impurity concentration than the impurity concentration of the high-density drain region.