Hybrid analog-digital matrix processors
AssigneeLightmatter, Inc.
InventorsTyler J. Kenney, Martin B. Z. Forsythe, Tomo Lazovich, Darius Bunandar
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Abstract
Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.
Claims20
A hybrid analog-digital processor comprising:
- circuitry comprising an analog processor, wherein the circuitry is configured to perform an operation involving a matrix, the performing comprising:
- determining a scaling factor for at least a portion of the matrix;
- scaling the at least the portion of the matrix using the scaling factor to obtain a scaled at least portion of the matrix;
- programming the analog processor using the scaled at least portion of the matrix;
- performing, by the analog processor programmed using the scaled at least portion of the matrix, the operation to generate an output;
- and
- determining a result of the operation involving the matrix using the output generated by the analog processor.
A method comprising:
- performing an operation involving a matrix using an analog processor of a hybrid analog-digital processor, the performing comprising:
- determining a scaling factor for at least a portion of the matrix;
- scaling the at least the portion of the matrix using the scaling factor to obtain a scaled at least portion of the matrix;
- programming the analog processor using the scaled at least portion of the matrix;
- performing, by the analog processor programmed using the scaled at least portion of the matrix, the operation to generate an output;
- and
- determining a result of the operation involving the matrix using the output generated by the analog processor.
A non-transitory computer-readable storage medium storing instructions that, when executed by a hybrid analog-digital processor, cause the hybrid analog-digital processor to perform an operation involving a matrix using an analog processor of the hybrid analog-digital processor, the performing comprising:
- determining a scaling factor for at least a portion of the matrix;
- scaling the at least the portion of the matrix using the scaling factor to obtain a scaled at least portion of the matrix;
- programming the analog processor using the scaled at least portion of the matrix;
- performing, by the analog processor programmed using the scaled at least portion of the matrix, the operation to generate an output;
- and
- determining a result of the operation involving the matrix using the output generated by the analog processor.
Dependencies are inferred from the claim text.