Static random access memory and method of controlling the same

A static random access memory (SRAM) comprising:

• a first memory cell array;
• a first word line coupled to the first memory cell array;
• a bit line coupled to the first memory cell array;
• a bit line bar coupled to the first memory cell array;
• a first driver circuit coupled to the bit line and the bit line bar;
• and
• a second driver circuit coupled to at least the bit line, wherein the second driver circuit is configured to:
• receive an enable signal, sense a voltage of a first signal of the bit line, and pull the voltage of the first signal to a first voltage level during a write operation of a first memory cell in the first memory cell array in response to at least the voltage of the first signal.

A method of operating a static random access memory (SRAM), the method comprising:

• receiving a first signal on a bit line and a second signal on a bit line bar, wherein the bit line and the bit line bar are coupled to a memory cell array;
• activating a supplementary driver circuit coupled to the bit line and the bit line bar, wherein the activating the supplementary driver circuit comprises:
• receiving an enable signal on a supplementary driver circuit control line;
• sensing at least a voltage of the first signal or a voltage of the second signal;
• and
• generating a first NOR signal or a second NOR signal in response to the voltage of the first signal or the voltage of the second signal;
• and
• selectively pulling the voltage of the first signal or the voltage of the second signal to a first voltage level in response to at least the first NOR signal or the second NOR signal.