Method and apparatus to reduce bandwidth overhead of crc protection on a memory channel

An information handling system, the information handling system comprising:

• a memory subsystem comprising a plurality of memory devices, the plurality of memory devices including a group of data memory devices configured to store data and at least one spare memory device;
• a processor having a memory controller for controlling the transfer of information between the processor and the memory subsystem;
• a bus between the processor and the memory subsystem, the bus comprising one or more data lanes for transferring information between the processor and each of the plurality of memory devices in the memory subsystem, the information handling system configured to:
• select information on a per memory device basis for transfer to the group of data memory devices to associate with one or more of the spare memory devices;
• disassociate the selected information for transfer from the group of data memory devices leaving remaining information;
• associate the selected information with the one or more of the spare memory devices;
• add Cyclical Redundancy Check (CRC) code to the remaining information;
• and
• transfer the CRC code and the remaining information over the bus between the processor and the plurality of memory subsystem.

A method of transferring information from a processor to a memory system for storing information, the method comprising:

• providing a memory system having a plurality of memory devices configured to store information, wherein at least one memory device is configured as a spare memory device and a group of the memory devices are configured as data memory devices to store data;
• providing a processor configured to handle and process information;
• providing an interface bus between the memory system and the processor to transfer information from the processor to the memory system;
• select a first portion of data on a per memory device basis from data targeting the group of data memory devices for transfer to the spare memory device leaving remaining data on a per memory device basis on the group of data memory devices;
• add cyclical redundancy check (CRC) code to the remaining data on the group of the data memory devices from which the selected data was identified for transfer;
• and
• transfer the remaining data and the CRC code during a burst transaction over the interface bus from the processor to the group of the data memory devices.