Data buffering operation of three-dimensional memory device with static random-access memory
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsYue Ping Li, Wei Jun Wan, Chun Yuan Hou
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AssigneeYangtze Memory Technologies Co., Ltd.
InventorsYue Ping Li, Wei Jun Wan, Chun Yuan Hou
Estimating the term…
Embodiments of a three-dimensional (3D) memory device and a method of operating the 3D memory device are provided. The 3D memory device includes an array of 3D NAND memory cells, an array of static random-access memory (SRAM) cells, and a peripheral circuit. The array of SRAM cells and the peripheral circuit arranged at one side are bonded with the array of 3D NAND memory cells at another side to form a chip. Data is received from a host through the peripheral circuit, buffered in the array of SRAM cells, and transmitted from the array of SRAM cells to the array of 3D NAND memory cells. The data is programmed into the array of 3D NAND memory cells.
A method of operating a three-dimensional (3D) memory device that comprises an array of 3D NAND memory cells, an array of static random-access memory (SRAM) cells, and a peripheral circuit, wherein the array of SRAM cells and the peripheral circuit arranged at one side are bonded with the array of 3D NAND memory cells at an another side to form a chip, the method comprising:
A method of operating a three-dimensional (3D) memory device comprising an array of 3D NAND memory cells and a device layer comprising a plurality of transistors, wherein:
A method of operating a three-dimensional (3D) memory device comprising an array of 3D NAND memory cells and an array of static random-access memory (SRAM) cells, the array of SRAM cells and the array of 3D NAND memory cells being arranged at opposite sides of one or more bonding contacts and attached to each other to form a chip, and the array of SRAM cells and the array of 3D NAND memory cells being coupled with each other through the one or more bonding contacts, the method comprising:
Dependencies are inferred from the claim text.