Semiconductor devices with backside power rail and methods of fabrication thereof

A semiconductor device, comprising:

• an isolation layer;
• first and second dielectric fins in contact with the isolation layer;
• a first source/drain feature formed between the first and second dielectric fins;
• a second source/drain feature formed between the first and second dielectric fins;
• a first conductive feature formed in the isolation layer and extending between the first and second dielectric fins to contact the first source/drain feature;
• and
• a dielectric feature in contact with the second source/drain feature, wherein the dielectric feature includes a first portion formed in the isolation layer, and a second portion formed between the first and second dielectric fins, and the second portion is wider than the first portion.

A method for forming a semiconductor device, comprising:

• forming a semiconductor fin on a semiconductor substrate;
• forming an isolation layer to cover a portion of the semiconductor fin;
• forming a contact alignment feature in the portion of semiconductor fin covered by the isolation layer;
• forming a first source/drain feature and a second source/drain feature over the semiconductor fin, wherein the first source/drain feature is aligned with the contact alignment feature;
• after forming the first and second source/drain features, removing the portion of the semiconductor fin in the isolation layer;
• forming a sacrificial liner to cover vertical sidewalls of the isolation layer and the contact alignment feature;
• and
• performing an etch process to expose the second source/drain feature with the sacrificial liner covering the sidewalls of the isolation layer and the alignment feature.