Gate stack for metal gate transistor

A method of forming a metal gate transistor, the method comprising:

• forming a semiconductor channel in a semiconductor substrate;
• depositing a source electrode and a drain electrode on the semiconductor channel, the source electrode and the drain electrode being spaced apart to define a source-to-drain direction parallel to major plane of the semiconductor substrate;
• providing dielectric spacers above the source electrode and the drain electrode, the dielectric spacers defining a gate void spanning the source electrode and the drain electrode;
• depositing a dielectric layer on a bottom wall of the gate void;
• depositing a work-function metal layer on the dielectric layer on the bottom wall to control work function between the semiconductor channel and a conductive metal gate material to be deposited;
• and
• filling the gate void above the work-function metal layer on the bottom wall, and between the spacers on the sidewalls, with the conductive metal gate material.

A metal gate transistor structure comprising:

• a semiconductor channel formed in a semiconductor substrate;
• a source electrode and a drain electrode deposited on the semiconductor channel, the source electrode and the drain electrode being spaced apart to define a source-to-drain direction parallel to major plane of the semiconductor substrate;
• dielectric spacers above the source electrode and the drain electrode, the dielectric spacers defining a gate void spanning the source electrode and the drain electrode;
• a dielectric layer on a bottom wall of the gate void;
• a work-function metal layer above the dielectric layer on the bottom wall to control work function between the semiconductor channel and material in the gate void;
• and
• a conductive metal gate material filling the gate void except where the dielectric layer and the work-function metal layer are present.

A metal gate transistor, produced by the process comprising:

• forming a semiconductor channel in a semiconductor substrate;
• depositing a source electrode and a drain electrode on the semiconductor channel, the source electrode and the drain electrode being spaced apart to define a source-to-drain direction parallel to major plane of the semiconductor substrate;
• providing dielectric spacers above the source electrode and the drain electrode, the dielectric spacers defining a gate void spanning the source electrode and the drain electrode;
• depositing a dielectric layer on a bottom wall and sidewalls of the gate void;
• depositing a work-function metal layer on the dielectric layer on the bottom wall and the sidewalls to control work function between the semiconductor channel and a conductive metal gate material to be deposited;
• etching away the work-function metal layer from the sidewalls leaving the work-function metal layer on the bottom wall;
• and
• filling the gate void above the work-function metal layer on the bottom wall, and between the dielectric layers on the sidewalls, with the conductive metal gate material.

A metal gate transistor, produced by the process comprising:

• forming a semiconductor channel in a semiconductor substrate;
• depositing a source electrode and a drain electrode on the semiconductor channel, the source electrode and the drain electrode being spaced apart to define a source-to-drain direction parallel to major plane of the semiconductor substrate;
• providing dielectric spacers above the source electrode and the drain electrode, the dielectric spacers defining a gate void spanning the source electrode and the drain electrode;
• depositing a dielectric layer on a bottom wall of the gate void;
• depositing a work-function metal layer on the dielectric layer on the bottom wall to control work function between the semiconductor channel and a conductive metal gate material to be deposited;
• and
• filling the gate void above the work-function metal layer on the bottom wall, and between the spacers on the sidewalls, with the conductive metal gate material.