Memory device and manufacturing method for the same

A manufacturing method for a memory device, comprising:

• stacking conductive layers and insulating layers alternately along a vertical direction to form a stacked structure, wherein the stacked structure comprises a first stacked portion, a second stacked portion and another first stacked portion disposed along a first direction, the first stacked portion and the another first stacked portion are respectively on opposing sides of the second stacked portion, the first stacked portion and the another first stacked portion are in a staircase contact region, the second stacked portion is in a memory array region;
• and
• etching the first stacked portion and the another first stacked portion with using photoresist layers to form a staircase structure, wherein in the staircase contact region, sizes of the photoresist layers in the first direction and/or a second direction are different from each other, the first direction, the second direction and the vertical direction are perpendicular to each other,
• wherein the memory device comprises:
• a stacked body structure comprising a first sub-stacked body structure and a second sub-stacked body structure, wherein the first sub-stacked body structure and the second sub-stacked body structure comprise the second stacked portion;
• and
• the staircase structure electrically connected to the stacked body structure, and comprising a first sub-staircase structure and a second sub-staircase structure, wherein each of the first sub-staircase structure and the second sub-staircase structure comprises a first staircase portion and a second staircase portion, the first sub-stacked body structure and the second sub-stacked body structure are respectively connected to the first staircase portion of the first sub-staircase structure and the first staircase portion of the second sub-staircase structure.