Radio frequency power dies having flip-chip architectures and power amplifier modules containing the same

A power amplifier module (PAM), comprising:

• a module substrate having a die support surface and a plurality of conductive contacts exposed at the die support surface;
• and
• a first radio frequency (RF) power die mounted to the die support surface of the module substrate in an inverted orientation, the first RF power die comprising:
• a die body having a frontside and an opposing backside, at least a portion of the die body composed of a high resistivity semiconductor material having an electrical resistance exceeding 520 ohms per centimeter;
• a transistor having active regions formed in the die body;
• a frontside layer system formed over the frontside of the die body and containing patterned metal layers defining first, second, and third branched electrode structures electrically coupled to the active regions of the transistor;
• and
• a frontside input/output (I/O) interface formed in an outer terminal portion of the frontside layer system, the frontside I/O interface containing first, second, and third bond pads;
• wherein the first, second, and third bond pads are electrically coupled to the first, second, and third branched electrode structures, respectively, while the third bond pad is further electrically coupled to the plurality of conductive contacts of the module substrate.

A power amplifier module (PAM), comprising:

• a module substrate having a die support surface;
• and
• a radio frequency (RF) power die mounted to the die support surface of the module substrate in an inverted orientation with a contact surface of the RF power die facing the die support surface, the RF power die comprising:
• a die body having a frontside and an opposing backside:
• a frontside layer system formed over the frontside of the die body, and defining the contact surface of the RF power die;
• a field effect transistor (FET) formed in the die body and in the frontside layer system, the FET comprising a branched drain electrode structure, a branched gate electrode structure, and a branched source electrode structure:
• and
• a frontside input/output (I/O) interface further formed in an outer terminal portion of the frontside layer system, the frontside I/O interface comprising:
• a drain bond pad electrically coupled to the branched drain electrode structure:
• a plurality of gate bond pads electrically coupled to the branched gate electrode structure;
• a first source bond pad electrically coupled to the branched source electrode structure:
• and
• at least one of:
• (i) a plurality of a source bond pads including the first source bond pad and interleaved with the plurality of gate bond pads in an alternating relationship;
• and (ii) a plurality of drain bond pads including the first drain bond pad and interleaved with the plurality of gate bond pads in an alternating relationship.

A radio frequency (RF) power die, comprising:

• a die body having a frontside and an opposing backside, the die body at partially composed of a high resistivity semiconductor material having an electrical resistance exceeding 520 ohms per centimeter;
• a frontside layer system formed over the frontside of the die body;
• a field effect transistor (FET) formed in the die body and in the frontside layer system, the FET comprising:
• a branched drain electrode structure;
• a branched gate electrode structure;
• a branched source electrode structure;
• and
• a frontside input/output (I/O) interface further formed in an outer terminal portion of the frontside layer system, the frontside I/O interface comprising:
• a first drain bond pad electrically coupled to the branched drain electrode structure;
• a first gate bond pad electrically coupled to the branched gate electrode structure;
• and
• a first source bond pad electrically coupled to the branched source electrode structure.