Semiconductor packages

A semiconductor package, comprising:

• a semiconductor chip comprising an active surface;
• and
• a redistribution structure on the active surface of the semiconductor chip,
• wherein the semiconductor chip comprises a plurality of first contact pads and a plurality of second contact pads alternately arranged in a first direction on the active surface, an insulating film on the active surface of the semiconductor chip and comprising a plurality of first openings respectively defining first pad regions of the plurality of first contact pads and a plurality of second openings respectively defining second pad regions of the plurality of second contact pads, and a plurality of first and second conductive capping layers on the first and second pad regions, respectively, each of the first and second conductive capping layers comprising an extension portion extending on the insulating film,
• wherein the redistribution structure comprises an insulating layer on the insulating film and a redistribution layer on the insulating layer,
• wherein the insulating layer comprises a plurality of first and second contact holes respectively connected to the plurality of first and second conductive capping layers,
• wherein the redistribution layer is respectively connected to the plurality of first and second conductive capping layers through the plurality of first and second contact holes,
• wherein each of the first and second pad regions comprises a bonding region having a first width and a probing region having a second width, greater than the first width,
• wherein each of the first pad regions is arranged in an order of the bonding region and the probing region in a second direction, intersecting the first direction, and
• wherein each of the second pad regions is arranged in an order of the probing region and the bonding region in the second direction.

A semiconductor package, comprising:

• a semiconductor chip comprising an active surface on which a plurality of first contact pads and a plurality of second contact pads are alternately arranged in a first direction;
• an insulating film on the active surface of the semiconductor chip and comprising a plurality of first and second openings having a shape respectively corresponding to the plurality of first and second contact pads;
• a plurality of first and second conductive capping layers on the plurality of first and second contact pads, respectively, each of the plurality of first and second conductive capping layers comprising a portion extending on the insulating film;
• an insulating layer on the insulating film and comprising a plurality of first and second contact holes respectively connected to the plurality of first and second conductive capping layers;
• and
• a redistribution layer on the insulating layer and respectively connected to the plurality of first and second conductive capping layers through the plurality of first and second contact holes,
• wherein each of the plurality of first and second contact pads comprises a bonding region having a first width and a probing region having a second width, greater than the first width,
• wherein each of the plurality of first and second contact pads is arranged such that the bonding region of the first contact pad is adjacent the probing region of the second contact pad and the bonding region of the second contact pad is adjacent the probing region of the first contact pad.