Timing precision maintenance with reduced power during system sleep

A method to maintain timing between different modes, the method comprising:

• receiving a command to switch from a first power mode to a second power mode;
• in response to receiving the command, detecting a next specified edge of a low frequency clock signal of a set of clock signals;
• and,
• switching to a clock signal corresponding to the second power mode at the detected edge of the low frequency clock.

A device to maintain timing between modes, the device comprising:

• a radio interface to communicate with another device;
• and,
• a clock circuit, comprising:
• a clock to generate a first clock signal having a first frequency;
• a clock divider to divide the first clock signal to generate a second clock signal at a second frequency, wherein the first frequency is higher than the second frequency;
• a multiplexor to receive the first and second clock signals as inputs;
• and
• a controller coupled to multiplexor to control the multiplexor to output the first clock signal during a first mode and to output the second clock signal during a second mode,
• wherein switching between the first clock signal and second clock signal by the multiplexor is performed based on a select edge of the second clock signal.