Hyperscalar packet processing

A system comprising:

• a first shared bus with a first arbiter configured to receive a plurality of network packets from a plurality of data paths;
• a plurality of packet processing blocks comprising one or more full processing blocks and one or more limited processing blocks, wherein each of the one or more full processing blocks is configured to process a first quantity of network packets during a clock cycle, and wherein each of the one or more limited processing blocks is configured to process during the clock cycle a second quantity of network packets that is greater than the first quantity of network packets;
• wherein processing the second quantity of network packets using one of the one or more limited processing blocks comprises:
• placing a data payload from a network packet of the second quantity of network packets in a first buffer;
• placing start and end of packet data from the network packet in a second buffer;
• processing the start and end of packet data using the limited processing block;
• and
• reassembling the packet data with the processed start and end of packet data;
• wherein the first arbiter is configured to arbitrate, based at least in part on an arbitration policy, the plurality of network packets for processing in parallel by the plurality of packet processing blocks;
• and
• a second shared bus with a second arbiter configured to arbitrate, based at least in part on the arbitration policy, the processed plurality of network packets to a plurality of data buses.

A non-transitory storage medium comprising instructions that, when read by one or more processors, cause a method comprising:

• receiving a plurality of network packets from a plurality of data paths;
• arbitrating, based at least in part on an arbitration policy, the plurality of network packets to a plurality of packet processing blocks comprising one or more full processing blocks and one or more limited processing blocks;
• processing, during a clock cycle, a first quantity of network packets using one of the one or more full processing blocks;
• processing, during the clock cycle, a second quantity of network packets using one of the one or more limited processing blocks, wherein processing the second quantity of network packets using one of the one or more limited processing blocks comprises:
• placing a data payload from a network packet of the second quantity of network packets in a first buffer;
• placing start and end of packet data from the network packet in a second buffer;
• processing the start and end of packet data using the limited processing block;
• and
• reassembling the packet data with the processed start and end of packet data;
• and
• sending the processed plurality of network packets through a plurality of data buses,
• wherein the plurality of network packets are processed in parallel, and wherein the second quantity of network packets is greater than the first quantity of network packets.