Charge pump, phase-locked loop circuit, and clock control apparatus

Abstract

A charge pump (321), a phase-locked loop circuit (301), and a clock control apparatus are provided, related to the field of wireless communications technologies, to implement a high-speed and low-noise charge pump in the clock control apparatus. The charge pump includes a degeneration circuit (3210), a charging current source transistor (Mio 1), a switch circuit (3211) and a discharging current source transistor (Mc 2). The charging current source transistor is configured to provide a charging current. The degeneration circuit is coupled between a first terminal of the charging current source transistor and a power supply terminal. The degeneration circuit is configured to degrade a first voltage corresponding to the power supply terminal to a second voltage. The switch circuit is coupled between a second terminal of the charging current source transistor and a load. The switch circuit is configured to control a charging current output to the load.

Dependencies are inferred from the claim text.