Back to results
US 2022/0045048 A1Published application
Semiconductor apparatus
AssigneeMitsubishi Electric Corporation
InventorTetsuo TAKAHASHI
Life of this patent
Estimating the term…
Abstract
A semiconductor apparatus includes a semiconductor substrate and a second electrode. Semiconductor substrate includes a device region and a peripheral region. An n− drift region and second electrode extend from device region to peripheral region. An n buffer layer and a p collector layer are provided also in peripheral region. Peripheral region is provided with an n type region. N type region is in contact with second electrode and n buffer layer. The turn-off loss of the semiconductor apparatus is reduced.
Claims8
A semiconductor apparatus comprising:
- a semiconductor substrate having a front surface and a back surface;
- a first electrode provided on the front surface;
- and
- a second electrode provided on the back surface,
- the semiconductor substrate including a device region including a first semiconductor device, and a peripheral region surrounding the device region,
- the first semiconductor device including an n− drift region, a p base region, an n+ emitter region being in contact with the first electrode, a gate insulating film provided on a portion of the p base region between the n+ emitter region and the n− drift region, a gate electrode facing the portion of the p base region with the gate insulating film interposed therebetween, an n buffer layer being in contact with the n− drift region and provided on the back surface side with respect to the n− drift region, and a p collector layer being in contact with the n buffer layer and provided on the back surface side with respect to the n buffer layer,
- the n− drift region, the n buffer layer, the p collector layer and the second electrode extending from the device region to the peripheral region, and
- the peripheral region being provided with an n type region, the n type region being in contact with the second electrode, and the p collector layer including a p collector portion between the n buffer layer and the n type region.
5 more elements
A semiconductor apparatus comprising:
- a semiconductor substrate having a front surface and a back surface;
- a first electrode provided on the front surface;
- and
- a second electrode provided on the back surface,
- the semiconductor substrate including a device region including a first semiconductor device, and a peripheral region surrounding the device region,
- the first semiconductor device including an n− drift region, a p base region, an n+ emitter region being in contact with the first electrode, a gate insulating film provided on a portion of the p base region between the n+ emitter region and the n− drift region, a gate electrode facing the portion of the p base region with the gate insulating film interposed therebetween, and a p collector layer provided on the back surface side with respect to the n− drift region and being in contact with the second electrode,
- the n− drift region and the second electrode extending from the device region to the peripheral region, and
- the peripheral region being provided with an insulating region, the insulating region being between the n− drift region and the second electrode, and being in contact with the second electrode.
5 more elements
Dependencies are inferred from the claim text.