Nand flash block architecture enhancement to prevent block lifting
AssigneeMicron Technology, Inc.
InventorsMartin Jared Barclay, Mark Tunik
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsMartin Jared Barclay, Mark Tunik
Estimating the term…
Disclosed is a three-dimensional memory device. In one embodiment, a device is disclosed comprising a source plate; plugs fabricated fabricated on or partially formed in the source plate; a stack formed on the substrate and plugs comprising alternating insulating layers and conductive layers and channel-material strings of memory cells extending through the insulating layers and conductive layers; a first set of pillars extending through the stack formed by a process including etching the alternating insulating layers and conductive layers and depositing a pillar material therein, wherein each pillar in the first set of pillars terminates atop a respective plug in the plurality of plugs; and a second set of pillars extending through the stack formed by a process including etching the alternating insulating layers and conductive layers and depositing a pillar material therein, wherein each pillar in the second set of pillars terminates in the source plate.
A semiconductor device comprising:
A method of making a semiconductor device, comprising:
Dependencies are inferred from the claim text.