Semiconductor devices with backside power distribution network and frontside through silicon via

A semiconductor structure, comprising:

• a dielectric layer in contact with a first surface of a substrate;
• a power distribution network in the dielectric layer, comprising:
• a first conductive line in contact with the first surface of the substrate;
• and
• a second conductive line in contact with a surface of the dielectric layer opposite to the first surface of the substrate;
• a plurality of backside vias in the substrate, wherein the plurality of backside vias are electrically coupled to the first conductive line;
• a via rail in contact with a second surface of the substrate, wherein the second surface is on an opposite side of the first surface;
• a first interlayer dielectric in contact with the via rail and the substrate;
• a second interlayer dielectric in contact with the first interlayer dielectric;
• a third interlayer dielectric in contact with the second interlayer dielectric;
• a first interconnect layer in the third interlayer dielectric;
• a plurality of vias in the first, second and third interlayer dielectrics, wherein the plurality of vias are connected to the first interconnect layer and the via rail;
• a second interconnect layer in contact with the plurality of vias and in the third interlayer dielectric, wherein the second interconnect layer is in contact with the plurality of vias;
• and
• a power supply layer in contact with the third interlayer dielectric and the second interconnect layer.

A semiconductor structure, comprising:

• a first conductive line on a first surface of a dielectric layer, wherein the first surface of the dielectric layer is in contact with a first surface of a substrate;
• a second conductive line in contact with a second surface of the dielectric layer;
• a plurality of backside vias in the substrate, wherein the plurality of backside vias are electrically coupled to the first conductive line;
• a via rail on a second surface of the substrate, wherein the via rail extends horizontally and is in contact with the plurality of backside vias;
• an interlayer dielectric in contact with the via rail and the second surface of substrate;
• first, second, and third interconnect layers in the interlayer dielectric;
• a plurality of interconnect structures in contact with the first interconnect layer and the via rail;
• a first via in the interlayer dielectric, wherein the first via is between the first interconnect layer and the second interconnect layer;
• a plurality of second vias between the second and third interconnect layers;
• and
• a power supply layer in contact with the interlayer dielectric and the third interconnect layer.