Control system with cascade driving circuits and related driving method

A control system, comprising:

• a plurality of driving circuits coupled in series, comprising:
• a first driving circuit, comprising:
• a first receiver;
• a first transmitter, coupled to the first receiver;
• and
• a first delay circuit, coupled between the first receiver and the first transmitter;
• and
• a second driving circuit, coupled to the first driving circuit, comprising:
• a second receiver;
• a second transmitter, coupled to the second receiver;
• and
• a second delay circuit, coupled between the second receiver and the second transmitter;
• wherein the first delay circuit and the second delay circuit are configured to synchronize a first driving signal output by the first driving circuit with a second driving signal output by the second driving circuit.

A method of driving a controller for a control system having a plurality of driving circuits coupled in series, the plurality of driving circuits comprising a first driving circuit and a second driving circuit, the method comprising:

• receiving, by the first driving circuit, a first signal from a previous stage;
• transmitting, by the first driving circuit, the first signal to the second driving circuit;
• delaying the first signal with a first delay circuit to generate a second signal in each of the first driving circuit and the second driving circuit;
• selecting a clock signal from a plurality of clock signals having different phases in a second delay circuit in each of the first driving circuit and the second driving circuit;
• and
• controlling a timing of outputting the second signal to the controller by using the selected clock signal, to synchronize the second signal output by the first driving circuit and the second driving circuit.

A driving circuit, comprising:

• a receiver;
• a transmitter, coupled to the receiver;
• and
• a replica receiver, coupled to an output terminal of the transmitter.

A driving circuit, comprising:

• a receiver;
• a transmitter, coupled to the receiver;
• and
• a delay circuit, coupled between the receiver and the transmitter, configured to output a driving signal;
• wherein the delay circuit comprises a select circuit coupled to output terminals of a plurality of flip-flops.