Methods and Devices for Erasing Non-Volatile Memory

A non-volatile memory device comprising:

• a non-volatile memory cell configured to conduct current in response to application of a threshold voltage, the non-volatile memory cell comprising an unwritten state when the threshold voltage is less than an erase-verify voltage;
• a biasing circuit configured to apply voltage to the non-volatile memory cell, the biasing circuit comprising a digital to analog converter to receive a digital control signal from a control circuit;
• a sensing circuit configured to sense whether the non-volatile memory cell conducts current;
• and
• the control circuit in communication with the biasing circuit and the sensing circuit, the control circuit being configured to
• control the biasing circuit to apply an erase voltage to the non-volatile memory cell to reduce the threshold voltage, the erase voltage having a magnitude set by operating parameters stored in a data location,
• control the biasing circuit to apply a test voltage to the non-volatile memory cell to determine whether the threshold voltage is less than the test voltage, the test voltage being less than the erase-verify voltage;
• replace the operating parameters in the data location with new operating parameters in response to determining that the threshold voltage of the non-volatile memory cell is greater than the test voltage;
• and
• execute an erase-verify operation to determine whether the threshold voltage of the non-volatile memory cell is less than the erase-verify voltage by controlling the biasing circuit to apply the erase-verify voltage to the non-volatile memory cell.