Operating method of generating enhanced bit line voltage and non-volatile memory device

An operating method of a non-volatile memory device, the non-volatile memory device comprising a memory array, the memory array comprises a plurality memory string groups, each memory string group comprises a plurality of memory strings, a plurality of bit lines and a plurality of word lines, each memory string coupled to one of the plurality of bit lines, each memory string comprising a plurality of memory cells connected in series, each memory cell coupled to one of the plurality of world lines, the operating method comprising:

• applying a first program voltage signal to selected word lines of the plurality of word lines connected to selected memory cells of the plurality of memory cells of the memory array during a first program period and measuring a first threshold voltage associated with the selected memory cells, wherein for each selected word line, at least one selected memory cell is connected to the each selected word line;
• applying a second program voltage signal to the selected word lines connected to the selected memory cells during a second program period and measuring a second threshold voltage associated with the selected memory cells;
• applying a test bit line voltage signal to selected bit lines of the plurality of bit lines and applying a third program voltage signal to the selected word lines connected to the selected memory cells during a third program period and measuring a third threshold voltage associated with the selected memory cells;
• determining an enhanced bit line voltage by comparing a difference between the third threshold voltage and the second threshold voltage with a difference between the second threshold voltage and the first threshold voltage.