A memory unit for a plurality of multi-bit convolutional neural network based computing-in-memory applications based on charge sharing, which is controlled by a first word line, a second word line, an enable signal, a first switching signal and a second switching signal, and the memory unit for the multi-bit convolutional neural network based computing-in-memory applications based on charge sharing comprising:
- at least one memory cell storing a weight, wherein the at least one memory cell is controlled by the first word line and comprises a local bit line transmitting the weight;
- and
- a computational cell connected to the at least one memory cell and receiving the weight via the local bit line, wherein the computational cell comprises an input bit line, an input bit line bar, an output bit line and an output bit line bar, each of the input bit line and the input bit line bar transmits a multi-bit input value, the computational cell is controlled by the second word line and the enable signal to generate a multi-bit output value on each of the output bit line and the output bit line bar according to the multi-bit input value multiplied by the weight, and the computational cell is controlled by the first switching signal and the second switching signal for charge sharing.