Internal voltage generation circuit and semiconductor memory apparatus including the same

A semiconductor memory apparatus comprising:

• a voltage comparison circuit configured to generate a control voltage by comparing a reference voltage with a feedback voltage which is fed back to the voltage comparison circuit;
• a voltage driving circuit configured to generate an internal voltage based on the control voltage, the internal voltage being used to generate the feedback voltage;
• a drivability control circuit configured to control a voltage level of the control voltage based on an enable signal which is activated during an active operation, in order to control drivability of the voltage driving circuit;
• and
• a loading control circuit configured to adjust a resistance value reflected into the drivability control circuit based on data information inputted to or outputted from a memory cell array circuit which is driven by the internal voltage.

A semiconductor memory apparatus comprising:

• a memory cell array configured to store data;
• and
• an internal voltage generation circuit including:
• a voltage comparison circuit configured to generate a control voltage by comparing a reference voltage with a feedback voltage;
• a voltage driving circuit configured to generate an internal voltage based on the control voltage and provide the internal voltage to the memory cell array, the internal voltage being fed back to the voltage comparison circuit as the feedback voltage;
• and
• a drivability control circuit configured to adjust a voltage level of the control voltage to control drivability of the voltage driving circuit based on at least one of process, voltage, temperature (PVT) skew and values in the data.