Multi-die peak power management for three-dimensional memory

A method of peak power management (PPM) for two or more memory dies, wherein each of the two or more memory dies comprises a PPM circuit having a contact pad held at an electrical potential shared between the two or more memory dies, the method comprising:

• comparing a potential of the contact pad with a first predetermined voltage;
• setting a pull-down current to an estimated peak power current when the potential of the contact pad is higher than the first predetermined voltage, wherein the estimated peak power current corresponds to a peak power operation on a selected memory die;
• comparing a total current of the PPM circuit on the selected memory die with a maximum current allowed on the selected memory die;
• and
• performing the peak power operation on the selected memory die when the total current is less than the maximum current.

A peak power management system on a memory chip with two or more memory dies, comprising:

• a peak power management circuit on each of the two or more memory dies, comprising:
• a first transistor configured to provide a first current from a first power source;
• a second transistor configured to provide a second current from a second power source, wherein the first transistor and the second transistor are connected at a first terminal;
• a first contact pad held at an electrical potential shared with a second contact pad of another peak power management circuit on a different memory die;
• a resistor connected in series with the first terminal and the first contact pad;
• and
• a fourth transistor configured to regulate a pull-down current flowing from the first contact pad through the fourth transistor.