Method for in-memory convolutional computation and corresponding integrated circuit
AssigneesSTMicroelectronics S.r.I., STMicroelectronics (Rousset) SAS
InventorsAntonino Conte, Francesco La Rosa
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AssigneesSTMicroelectronics S.r.I., STMicroelectronics (Rousset) SAS
InventorsAntonino Conte, Francesco La Rosa
Estimating the term…
In an embodiment a method for convolutional computation (CNVL) of input values with weight factors includes converting the input values to voltage signals and successively applying the voltage signals on selected bit lines in an array of non-volatile memory points over respective time slots, each memory point comprising a phase-change resistive memory cell coupled to a bit line and having a resistive state corresponding to a weight factor, and a bipolar selection transistor coupled in series with the phase-change resistive memory cell and having a base terminal coupled with a word line, wherein the respective voltage signals bias the respective phase-change memory cells, integrating over the successive time slots read currents resulting from the voltage signals biasing the respective phase-change resistive memory cells and flowing through selected word lines and converting the integrated read currents to output values.
A method for convolutional computation (CNVL) of input values with weight factors, the method comprising:
An integrated circuit for convolutional computation (CNVL) of input values with weight factors, the integrated circuit comprising:
The integrated circuit according to claim 19, wherein the input converter circuit comprises an emulating circuit of a memory point configured to emulate a selection bipolar transistor in a biased condition by an emulated read current, in order to generate an offset voltage under in-situ condition.
Dependencies are inferred from the claim text.