Low latency fine grain system-on-chip throttling apparatus and method on usb type-c port
AssigneeIntel Corporation
InventorsUdaya Shankar Natarajan, Kannappan Rajaraman
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AssigneeIntel Corporation
InventorsUdaya Shankar Natarajan, Kannappan Rajaraman
Estimating the term…
A software and hardware architecture framework utilize the specifications of Universal Serial Bus (USB) Type-C and Power Deliver (PD) to provide fine grain throttling of a processor (e.g., system-on-chip (SoC)). Based on an external charger connection or disconnection, a low latency fine grain power budget loss or gain indication to the processor is delivered. The mechanism of various embodiments is also applicable to connection or disconnection of VBUS powered peripheral devices to the system. The net power loss or gain available to the SoC and System is proportionally used to scale the processor throttling.
An apparatus comprising:
A system comprising:
A machine-readable storage media having machine-executable instructions that when executed cause one or more machines to perform a method comprising:
Dependencies are inferred from the claim text.