Avalanche Photodiode and Method for Manufacturing Same
AssigneeNippon Telegraph and Telephone Corporation
InventorsYuki Yamada, Fumito Nakajima
Life of this patent
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Abstract
An embodiment avalanche photodiode includes a substrate, an n-type contact layer, a buffer layer, a multiplication layer, a field-control layer, an absorption layer, and a p-type contact layer. A conductive layer is formed in a central part of the buffer layer. The substrate is constituted of a semiconductor with a higher thermal conductivity than InP such as SiC, and the n-type contact layer is constituted of a same semiconductor as the substrate and is made n-type.
Claims12
-8. (canceled)
An avalanche photodiode comprising:
- a substrate comprising a semiconductor having a higher thermal conductivity than InP;
- an n-type contact layer on the substrate and comprising an n-type of the semiconductor;
- a multiplication layer on the n-type contact layer and comprising a non-doped group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP;
- a field-control layer on the multiplication layer and comprising a first group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP;
- an absorption layer on the field-control layer and comprising a second group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP;
- and
- a p-type contact layer on the absorption layer and comprising a p-type group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP.
A method of manufacturing an avalanche photodiode, the method comprising:
- a first step of forming an n-type contact layer on a first substrate comprising a semiconductor with a higher thermal conductivity than InP, wherein the n-type contact layer comprises an n-type of the semiconductor;
- a second step of forming a p-type contact layer on a second substrate, the second substrate comprising a first group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP, wherein the p-type contact layer comprises a p-type group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP, forming an absorption layer on the p-type contact layer, the absorption layer comprising a second group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP, forming a field-control layer on the absorption layer, the field-control layer comprising a third group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP, and forming a multiplication layer on the field-control layer, the multiplication layer comprising a non-doped group III-V compound semiconductor having a lattice constant in a planar direction that matches that of InP;
- a third step of bonding the first substrate and the second substrate to each other so that a side of the first substrate on which the n-type contact layer is formed and a side of the second substrate on which the multiplication layer is formed face each other;
- and
- a fourth step of removing the second substrate after bonding the first substrate and the second substrate to each other, wherein the n-type contact layer, the multiplication layer, the field-control layer, the absorption layer, and the p-type contact layer are stacked on the first substrate in this order.
Dependencies are inferred from the claim text.