Integrated circuit devices including a vertical field-effect transistor (vfet) and methods of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYOUNG CHAI JUNG, Seon Bae KIM, Seung Hyun SONG
Life of this patent
Estimating the term…
Abstract
Integrated circuit devices and methods of forming the same are provided. Integrated circuit devices may include a vertical field-effect transistor (VFET) that includes a bottom source/drain region in a substrate, a channel region on the bottom source/drain region, a top source/drain region on the channel region, and a gate structure on a side of the channel region. The channel region may have a cross-shaped upper surface.
Claims20
A method of forming a vertical field-effect transistor (VFET), the method comprising:
- providing a substrate;
- forming a first mask layer and a second mask layer on the substrate, wherein the first mask layer comprises a plurality of first portions that are spaced apart from each other in a first horizontal direction, and each of the plurality of first portions has a line shape extending in a second horizontal direction, wherein the first horizontal direction and the second horizontal direction are parallel to an upper surface of the substrate and are different from each other, wherein the second mask layer comprises a plurality of second portions that are spaced apart from each other in the first horizontal direction and are arranged along the first horizontal direction, and each of the plurality of second portions connects two adjacent ones of the plurality of first portions;
- forming an etch mask layer by removing portions of the first mask layer and the second mask layer, wherein the etch mask layer comprises a cross-shaped upper surface;
- and
- forming a channel region of the VFET by etching the substrate using the etch mask layer as an etch mask.
A method of forming a vertical field-effect transistor (VFET), the method comprising:
- providing a substrate;
- forming a first mask layer on the substrate, wherein the first mask layer extends longitudinally in a first horizontal direction;
- forming a second mask layer that extends longitudinally in a second horizontal direction on the substrate, wherein the first horizontal direction and the second horizontal direction are parallel to an upper surface of the substrate and are different from each other, and wherein the second mask layer includes a first portion extending from a first sidewall of the first mask layer and a second portion extending from a second sidewall of the first mask layer,
- forming a third mask layer on the first mask layer and the second mask layer, wherein the third mask layer overlaps a first contact surface between the first mask layer and the first portion of the second mask layer and a second contact surface between the first mask layer and the second portion of the second mask layer;
- forming an etch mask layer by removing portions of the first mask layer and the second mask layer using the third mask layer as an etch mask;
- and
- forming a channel region of the VFET by etching the substrate using the etch mask layer as an etch mask.
A method of forming a vertical field-effect transistor (VFET), the method comprising:
- forming a bottom source/drain region in a substrate;
- forming a channel region on the bottom source/drain region, wherein the channel region comprises a cross-shaped upper surface;
- forming a top source/drain region on the channel region;
- forming a gate structure on a side of the channel region;
- forming a first spacer vertically interposed between the bottom source/drain region and the gate structure;
- and
- forming a second spacer vertically interposed between the gate structure and the top source/drain region.
Dependencies are inferred from the claim text.