Method of manufacturing a semiconductor device and a semiconductor device

A method of manufacturing a semiconductor device, comprising:

• forming an upper fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked over a lower fin structure;
• forming a sacrificial gate structure over the upper fin structure;
• etching a source/drain region of the upper fin structure, which is not covered by the sacrificial gate structure, thereby forming a source/drain space;
• laterally etching the first semiconductor layers through the source/drain space;
• forming an inner spacer made of a dielectric material on an end of each of the etched first semiconductor layers;
• and
• forming a source/drain epitaxial layer in the source/drain space to cover the inner spacer,
• wherein in etching the source/drain region, a part of the lower fin structure is also etched to form a recess, in which a (111) surface is exposed, and
• the source/drain epitaxial layer includes multiple SiGe layers having different Ge contents.

A semiconductor device, comprising:

• semiconductor wires or sheets disposed over a substrate;
• a source/drain epitaxial layer in contact with the semiconductor wires or sheets;
• a gate dielectric layer disposed on and wrapping around each channel region of the semiconductor wires or sheets;
• a gate electrode layer disposed on the gate dielectric layer and wrapping around each channel region;
• and
• insulating spacers disposed in spaces, respectively, the spaces being defined by adjacent semiconductor wires or sheets, the gate electrode layer and the source/drain region,
• wherein the source/drain epitaxial layer includes multiple SiGe layers having different Ge contents.