Symmetric arrangement of field plates in semiconductor devices

A semiconductor device comprising:

• an active region above a substrate;
• source and drain electrodes in contact with the active region;
• a gate above the active region and laterally between the source and drain electrodes;
• a first set of field plates between the source electrode and the gate, each field plate in the first set is spaced apart from one another;
• a second set of field plates between the drain electrode and the gate, each field plate in the second set is spaced apart from one another;
• wherein the gate is spaced apart laterally and substantially equidistant from the first set of field plates and the second set of field plates;
• and
• wherein the field plates in the first set and the field plates in the second set have upper surfaces that are substantially coplanar with an upper surface of the gate.

A method of forming a semiconductor device comprising:

• forming an active region above a substrate;
• forming
• a gate above the active region, a first field plate, and a second field plate, the gate being spaced apart laterally and substantially equidistant from the first field plate and the second field plate;
• and
• forming source and drain electrodes to contact the active region, the gate being laterally between the source and drain electrodes, wherein the first field plate is between the source electrode and the gate, and the second field plate is between the drain electrode and the gate.