Solid-state image-capturing element and electronic device
AssigneeSony Semiconductor Solutions Corporation
InventorsYUSUKE TANAKA, TAKASHI NAGANO, TOSHIFUMI WAKANO, TAKESHI MATSUNUMA
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Abstract
The present disclosure relates to a solid-state image-capturing element and an electronic device capable of reducing the capacitance by using a hollow region. At least a part of a region between an FD wiring connected to a floating diffusion and a wiring other than the FD wiring is a hollow region. The present disclosure can be applied to a CMOS image sensor having, for example, a floating diffusion, a transfer transistor, an amplifying transistor, a selection transistor, a reset transistor, and a photodiode.
Claims12
A semiconductor device, comprising:
- a semiconductor substrate including an impurity region;
- and
- a wiring layer including:
- a first wiring connected to the impurity region;
- a second wiring;
- and
- a first hollow region, wherein the first hollow region is between the first wiring and the second wiring.
Dependencies are inferred from the claim text.