Fuse Cell Structure

A semiconductor structure, comprising:

• first and second transistors, each of the first and the second transistors having a source terminal, a drain terminal, and a gate terminal;
• a word line conductor that is electrically connected to the gate terminals of the first and the second transistors;
• a program line conductor;
• and
• a vertically stacked dual anti-fuse elements, wherein the vertically stacked dual anti-fuse elements includes first, second, and third metal plates stacked over the first and the second transistors and separated from each other by insulators, wherein the source terminal of the first transistor is electrically connected to the first metal plate, the source terminal of the second transistor is electrically connected to the third metal plate, and the program line conductor is electrically connected to the second metal plate.

A semiconductor structure, comprising:

• a first transistor having a source terminal, a drain terminal, and a gate terminal;
• a word line conductor that is electrically connected to the gate terminal of the first transistor;
• a bit line conductor that is electrically connected to the drain terminal of the first transistor;
• a program line conductor;
• and
• a vertically stacked dual anti-fuse elements, wherein the vertically stacked dual anti-fuse elements includes a stack of three metal plates separated from each other by insulators, wherein the source terminal of the first transistor is electrically connected to a bottom one and a top one of the three metal plates, and the program line conductor is electrically connected to a middle one of the three metal plates.