US 2022/0037295 A1 · SEMICONDUCTOR PACKAGE

Abstract

A semiconductor package includes a bottom package and an upper redistribution layer disposed on the bottom package. The bottom package includes a substrate and a semiconductor chip disposed on the substrate. A conductive pillar extends upwardly from the substrate and is spaced apart from the semiconductor chip. A mold layer is disposed on the substrate and encloses the semiconductor chip and lateral side surfaces of the conductive pillar. The conductive pillar includes a connection pillar configured to electrically connect the substrate to the upper redistribution layer and an alignment pillar that is spaced apart from the connection pillar. The upper redistribution layer includes a redistribution metal pattern configured to be electrically connected to the connection pillar. A first insulating layer is in direct contact with a top surface of the redistribution metal pattern. A top surface of the alignment pillar is in direct contact with the first insulating layer.

Claims20

Dependent claims

A semiconductor package, comprising:

a bottom package;
and
an upper redistribution layer disposed on the bottom package,
wherein the bottom package comprises:
a substrate;
a semiconductor chip disposed on the substrate;
a conductive pillar that extends upwardly from the substrate, the conductive pillar is spaced apart from the semiconductor chip;
and
a mold layer disposed on the substrate and enclosing the semiconductor chip and lateral side surfaces of the conductive pillar,
wherein the conductive pillar comprises:
a connection pillar configured to electrically connect the substrate to the upper redistribution layer;
and
an alignment pillar that is spaced apart from the connection pillar,
wherein the upper redistribution layer comprises:
a redistribution metal pattern configured to be electrically connected to the connection pillar;
and
a first insulating layer in direct contact with a top surface of the redistribution metal pattern, and
wherein a top surface of the alignment pillar is in direct contact with the first insulating layer.

15 more elements

A semiconductor package, comprising:

a bottom package;
an upper redistribution layer disposed on the bottom package;
and
an upper package disposed on the upper redistribution layer,
wherein the bottom package comprises:
a substrate:
a semiconductor chip disposed on the substrate;
a conductive pillar that extends upwardly from the substrate, the conductive pillar is spaced apart from the semiconductor chip;
and
a mold layer disposed on the substrate and enclosing lateral side surfaces of the semiconductor chip and lateral side surfaces of the conductive pillar,
wherein the conductive pillar comprises:
a connection pillar configured to electrically connect the substrate to the upper redistribution layer;
and
an alignment pillar that is spaced apart from the connection pillar, wherein the upper redistribution layer comprises:
an interfacial layer disposed on the mold layer;
a redistribution metal pattern configured to be electrically connected to the connection pillar;
and
a first insulating layer disposed on the interfacial layer and the redistribution metal pattern;
and
wherein the alignment pillar is configured to be electrically disconnected from the redistribution metal pattern.

17 more elements

Dependencies are inferred from the claim text.

Semiconductor package

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Semiconductor package

Life of this patent

Abstract

Claims20