Semiconductor device and semiconductor package

A semiconductor device, comprising:

• a semiconductor substrate having a first surface and a second surface, which are opposite to each other;
• a transistor disposed on the first surface of the semiconductor substrate;
• a power rail electrically connected to a terminal of the transistor;
• a lower insulating layer disposed on the second surface of the semiconductor substrate;
• a plurality of lower interconnection lines disposed in the lower insulating layer;
• and
• a penetration via structure penetrating the semiconductor substrate and electrically connecting a corresponding one of the lower interconnection lines to the power rail,
• wherein the penetration via structure extends from the second surface toward the first surface in a direction substantially perpendicular to the second surface of the semiconductor substrate, and
• the penetration via structure comprises:
• a first conductive pattern electrically connected to the power rail;
• and
• a second conductive pattern electrically connected to the corresponding lower interconnection line,
• wherein the first conductive pattern comprises a metal different from the second conductive pattern.

A semiconductor package, comprising:

• a lower semiconductor chip including a semiconductor substrate and a penetration via structure penetrating the semiconductor substrate;
• and
• an upper semiconductor chip disposed on the lower semiconductor chip,
• wherein the upper semiconductor chip is electrically connected to the lower semiconductor chip through the penetration via structure, and
• the penetration via structure comprises:
• a first conductive pattern penetrating a lower portion of the semiconductor substrate;
• and
• a second conductive pattern penetrating an upper portion of the semiconductor substrate,
• wherein the first conductive pattern comprises a metal different from the second conductive pattern.