Memory device and method of operating the same
AssigneeSK hynix Inc.
InventorHyung Jin CHOI
Life of this patent
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AssigneeSK hynix Inc.
InventorHyung Jin CHOI
Estimating the term…
Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of memory cells and a plurality of page buffers. The plurality of page buffers may be coupled to the plurality of memory cells through a plurality of bit lines. The plurality of page buffers may perform a bit line precharge operation of precharging first bit lines coupled to first memory cells, among the plurality of memory cells, to a first voltage, the bit line precharge operation being included in a memory operation of detecting threshold voltages of the first memory cells, and clamp potentials of second bit lines coupled to second memory cells, among the plurality of memory cells, to a second voltage during the memory operation.
A memory device, comprising:
A page buffer, comprising:
A method of operating a memory device including a plurality of memory cells, the method comprising:
Dependencies are inferred from the claim text.