US 2022/0036950 A1 · SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE

Abstract

Provided herein is a semiconductor memory device and a method of operating the semiconductor memory device. The semiconductor memory device includes: a memory cell array comprising a plurality of memory cells to be programmed to a plurality of programmed states; a peripheral circuit configured to perform a program operation on selected memory cells among the plurality of memory cells; a current sensing circuit configured to perform an individual state current sensing operation and an overall state current sensing operation on selected memory cells among the memory cells and determine a result of the program operation on each for the plurality of programmed states; and control logic configured to control the peripheral circuit and the current sensing circuit such that an operation period of the overall state current sensing operation at least partially overlaps with an operation period of a bit line set-up operation of the program operation.

Claims19

Dependent claims

A semiconductor memory device comprising:

a memory cell array comprising a plurality of memory cells to be programmed to a plurality of programmed states;
a peripheral circuit configured to perform a program operation on selected memory cells among the plurality of memory cells;
a current sensing circuit configured to perform an individual state current sensing operation and an overall state current sensing operation on selected memory cells among the memory cells and determine a result of the program operation for each of the plurality of programmed states;
and
control logic configured to control the peripheral circuit and the current sensing circuit such that an operation period of the overall state current sensing operation at least partially overlaps with an operation period of a bit line set-up operation of the program operation.

2 more elements

A method of operating a semiconductor memory device, comprising:

performing a first program operation corresponding to a first programmed state of a plurality of programmed states;
performing a first individual current sensing operation corresponding to the first program operation and determining whether the first program operation has passed;
performing a second program operation corresponding to a second programmed state having a threshold voltage distribution higher than a threshold voltage distribution of the first programmed state based on a result of the first individual current sensing operation;
performing a second individual current sensing operation corresponding to the second program operation and determining whether the second program operation has passed;
performing an overall state current sensing operation;
and
performing, when a result of the overall state current sensing operation indicates a fail, an additional program operation and then re-performing the process from the overall state current sensing operation,
wherein the overall state current sensing operation and an operation period of the additional program operation at least partially overlap with each other.

5 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device and method of operating the semiconductor memory device

Life of this patent

Semiconductor memory device and method of operating the semiconductor memory device

Life of this patent

Abstract

Claims19