Apparatuses, systems, and methods for system on chip replacement mode
AssigneeMicron Technology, Inc.
InventorsKatsuhiro Kitagawa, Yoshihito Morishita, Daigo Toyama, Takamasa Suzuki
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AssigneeMicron Technology, Inc.
InventorsKatsuhiro Kitagawa, Yoshihito Morishita, Daigo Toyama, Takamasa Suzuki
Estimating the term…
Apparatuses, systems, and methods for a system on chip (SoC) replacement mode. A memory device may be coupled to a SoC which may act as a controller of the memory. Commands and addresses may be sent along a command/address (CA) bus to a first decoder of the memory. The first decoder may use a first reference voltage to determine a value of signals along the CA bus. One of the pins of the CA bus may be coupled to a second decoder which may use a different second reference voltage. When the voltage on the pin exceeds the second reference voltage, the memory device may enter a SoC replacement mode, in which the memory may take various actions to preserve data integrity, while a new SoC comes online.
An apparatus comprising:
(canceled)
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.