Pipelined fft with localized twiddle

A digital processing system, comprising:

• a plurality of stages of processing elements configured in a sequence, wherein a number of stages is a function of a number of inputs and the plurality of stages form a processing pipeline;
• a plurality of memory storage devices coupled to each stage of the plurality of stages, the memory storage devices adapted to store interim results;
• a final stage of processing elements configured to combine outputs from the sequence of stages;
• and
• a controller adapted to iteratively process data through the processing elements.

A digital processing method, comprising:

• determining a number of stages for digital processing as a function of a number of inputs in an input sample;
• determining a number of cycles for each stage of the stages;
• receiving the number of inputs;
• processing the input samples in each successive stage according to the number of cycles for each stage, wherein the number of cycles is a function of a sample size;
• and
• generating results from the processing.